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Project VE-VIDES

Against hacker attacks: Innovative chip architectures, modelling and verification methods for trustworthy electronics

Hackers are already targeting networked vehicles, machines, industrial and telecommunications systems to gain illegal advantages, such as harming competitors, stealing intellectual property or leaking sensitive data.

At the same time, there is a growing need to make automotive systems, corporate and production networks more functional, convenient, traffic-safe and energy- and cost-efficient. These requirements alone are not only making the systems more and more complex and demanding in their development. They are also becoming increasingly networked. More complexity and more networking also offer more opportunities for attacks on these systems, which can also have a greater impact and are therefore also more lucrative for offenders.

In the project, IMMS and its partners are securing the design of integrated systems through innovative chip architectures and automated modelling and verification methods. This should enable the trustworthiness of the system to be continuously checked not only during the design, but also during operation, and thus a hacker attack to be blocked.

Acronym / Name:

VE-VIDES / Design methods and HW/SW co-verification for the unique identifiability of electronic components

Duration:2021 – 2024


|IC design| chip design| design methodology| AI| models| modelling| design support

Research field:Integrated sensor systems

Related content

All publicationsVE-VIDES
Palm-sized open box with circuit boards.


SMACD 2024

International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)

Plastic box with circuit boards and chip, IMMS logo and chip number.


edaWorkshop 2024

edaWorkshop24 and the European Nanoelectronics Applications, Design & Technology Conference (ADTC)


CiS Workshop 2023

Workshop Simulation & Design 2023 at CiS Forschungsinstitut für Mikrosensorik


SMACD 2023

International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design

Press release,

Reliable and faster chip designs through invasive and parametric simulation methods

Dissertation on new methods for automation in integrated circuit design



Eric Schäfer, M. Sc.

Head of Microelectronics / Branch Office Erfurt

eric.schaefer(at) (0) 361 663 25 35

Eric Schäfer and his team research Integrated sensor systems, especially CMOS-based biosensors, ULP sensor systems and AI-based design and test automation. The results are being incorporated into research on the lead applications Sensor systems for in-vitro diagnostics and RFID sensor technology. It will assist you with services for the development of Integrated circuits and with IC design methods.


The joint project VE-VIDES is funded by the Federal Ministry of Education and Research under the reference 16ME0246.

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Core topic

AI-based design and test automation

We are researching to use AI to make the development process of integrated sensor systems safer and more cost-effective. AI can help developers in the process to avoid errors and apply informal knowledge in an automated way.

Service for R&D

IC design methods

We develop new AI-based methods and tools for your system-on-chip and FPGA designs to master the increasing complexity of integrated systems and thus further increase performance.

Service for R&D

Integrated Circuits

We offer the design and realisation of application-specific integrated circuits (ASICs) in CMOS, BiCMOS and SOI technologies. We achieve well-performing ASICs with our first runs (first-time right silicon).

Research field

Integrated sensor systems

Here we investigate miniaturised systems manufactured in semiconductor technology consisting of microelectronic components for sensors applications, as well as methods to design these highly complex systems efficiently and safely.