DATE 2015 in Grenoble

Poster am 11.3.2015, 14:00 - 16:00, Grenoble, University Booth, Booth 4, Exhibition Area, UB07.8: Georg Gläser (IMMS), Eckhard Hennig (IMMS), Vojtech Dvorak (University of Brno Czech Republic): "FPGA-based Hardware Acceleration of Analog/Mixed-Signal SystemC Models"

Abstract:

System-level verification of large-scale mixed-signal systems using virtual prototypes is a powerful tool for design and verification. Still, the limited computing power demands for new methods to enhance the simulation performance. For digital hardware development FPGA-based prototyping is commonly used to enable faster verification of hardware and software system-components. We focus on a new approach for embedding system-level analog/mixed-signal (A/MS) models in FPGA-based verification environments. Starting from a system-level SystemC description of an A/MS circuit, we synthesize a model-specific FPGA-based hardware accelerator capable of executing A/MS model-code using floating-point data types. This new approach will be demonstrated by prototyping an A/MS pressure-sensor frontend ASIC on an FPGA board.