Publikationsübersicht –MetaX
To Clock or Not to Clock: Clock Gating Using Netlist Carpentry
Adrian Pitterling1. Manuel Jirsak1. Eric Schäfer1. Georg Gläser1.2026 22th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), June 29 - July 2, 2026, Dresden, Germany
1IMMS Institut für Mikroelektronik- und Mechatronik-Systeme gemeinnützige GmbH (IMMS GmbH), Ehrenbergstraße 27, 98693 Ilmenau, Germany.Sending a machine to do a humans job? – Concepts and Ideas for AI and Chip Design
Georg Gläser1.VDE – ITG Work Group MN 5.6 fWLR / Wafer Level Reliability, Reliability – Simulation & Qualification, May 11-13, 2026, Erfurt, Germany
1IMMS Institut für Mikroelektronik- und Mechatronik-Systeme gemeinnützige GmbH (IMMS GmbH), Ehrenbergstraße 27, 98693 Ilmenau, Germany.Wire we doing this? Open-Source Digital Circuit Processing in Python
Manuel Jirsak1. Adrian Pitterling1. Georg Gläser1.edaWorkshop26, Mai 05-06, 2026, Dresden, Germany
1IMMS Institut für Mikroelektronik- und Mechatronik-Systeme gemeinnützige GmbH (IMMS GmbH), Ehrenbergstraße 27, 98693 Ilmenau, Germany.Clock Gate Insertion with a Yosys-based Netlist Modification Tool
Manuel Jirsak1. Adrian Pitterling1. Jonas Lienke1. Georg Gläser1.FPGA Ignite Summer School, 5. - 9. August 2024, Heidelberg, Germany
1IMMS Institut für Mikroelektronik- und Mechatronik-Systeme gemeinnützige GmbH, Ehrenbergstraße 27, 98693 Ilmenau, Germany.